computer loads, including microprocessors, network instruments, or even data centers, may change their power demands in a large magnitude and at high slew rate. moreover, the computer loads require constant supply voltage to avoid internal logical-circuit error. it is a difficult challenge to design a power converter meeting the requirements in fast dynamic response as well as high efficiency and high power density. in a perspective of system level, a fast load transient may lead to bus voltage oscillations in a dc power system, when cpls are connected to the bus. this talk is to show our recent study in the issue of fast transient in both converter level and system level. the proposed auxiliary-circuit method can break through the physical limit of dc-dc converters to reduce voltage deviations, and also can be used for the stabilization of cpl dc system.
speaker:
zhenyu shan zhenyu shan received the b.eng and m.eng degrees in control engineering from beijing jiaotong university, in 2007 and 2009, respectively, and the ph.d. degree in power electronics from hong kong polytechnic university, in 2013. supported by the ph.d. student attachment program of the university, he was a visiting student at grainger center for electric machinery and electromechanics, university of illinois at urbana-champaign, from march to june 2013. dr. shan has been a postdoctoral fellow with the department of electrical and computer engineering, the university of british columbia, since november 2013. he serves as a reviewer for various ieee transactions and other international journals on electrical and electronic engineering. his research interests include: converter-based ac–dc systems, computer power supply design, and power converter modeling and nonlinear control.
12月17日下午2点在2区308
联系人：李永东
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